1. Field of the Invention
The invention relates to a memory defect masking device, more particularly to a memory defect masking device which is to be used in combination with a plurality of memory devices and which is capable of replacing the defective memory spaces of the memory devices.
2. Description of the Related Art
Good yield rate is an important consideration when manufacturing memory chips. There are two ways to improve the yield rate of memory chips. The first way is to improve the manufacturing process so as to reduce the occurrence of defective memory chips. The second way is to modify the construction of the memory chips. Such modifications have been disclosed in U.S. Pat. Nos. 4,733,372 and 4,829,480. FIG. 1 is an illustration of a conventional 1M Bit DRAM (dynamic RAM) unit. The DRAM unit comprises a memory array (100) having 512 rows and 2048 columns. The DRAM unit is further provided with redundant memory rows (110) and/or columns (120). After the DRAM unit is manufactured, the DRAM unit undergoes a sorting stage so as to determine whether or not the DRAM unit is defective. If the DRAM unit has a defective memory space, the corresponding row or column fuses (130, 140) is cut so as to disable the defective memory space. A redundant memory row or column (110, 120) is then connected via the redundant row or column decoders (112, 122) so as to serve as a replacement for the defective memory space. This illustrates how the defective memory spaces of a DRAM unit are conventionally repaired.
The main drawback of the above disclosed repairing procedure is as follows: The entire row or column is replaced when a defective memory bit is found. In the 1M Bit DRAM example, each column has 512 bits while each row has 2048 bits. Thus, a minimum of 512 bits of redundant memory column is needed to repair a defective memory bit.
As the number of defective memory spaces increases, the required number of redundant memory rows or columns correspondingly increases, thereby increasing the size of the memory chip. This illustrates why it is impractical to provide a large number of redundant memory rows or columns. However, it is possible that the number of defective memory spaces will exceed the allocated number of redundant memory rows or columns. The memory chip is therefore beyond repair and should thus be discarded. The manufacturer should therefore choose a proper number of redundant memory rows or columns so as to minimize the number of memory chips which are beyond repair while limiting the increase in the size of the memory chip.
The DRAM units undergo a packaging process after being sorted. It is possible that some of the packaged DRAM chips will be found defective during further burn-in and testing processes. Since defect has been detected after the DRAM units have already been packaged, the above described repairing procedure cannot be employed to correct the defective memory chips. Thus, the defective DRAM units are also beyond repair and should be discarded.